Published November 1999
by IEEE Standards Office .
Written in English
|Contributions||Thuy Dao (Editor), M. Koyanagi (Editor), Terence Hook (Editor)|
|The Physical Object|
|Number of Pages||224|
Get this from a library! 4th International Symposium on Plasma Process-Induced Damage: May , , Monterey, California, USA. [Leanne Thuy Lien Dao; Mitsumasa Koyanagi; Terence Hook; IEEE Electron Devices Society.; American Vacuum Society.; Ōyō Butsuri Gakkai.;]. International Symposium on Plasma Process-Induced Damage (4th: Monterey, Calif.). 4th International Symposium on Plasma Process-Induced Damage. Sunnyvale, CA: Northern California Chapter of the American Vacuum Society, © (DLC) (OCoLC) Material Type: Conference publication, Document, Internet resource. Proceedings of 4th International Symposium on Plasma Process-Induced Damage, edited by T. Dao, M. Koyanagi, and T. Hook (Northern California Chapter of the American Vacuum Society, Sunnyvale, CA, ).Cited by: Original language: English: Pages: Number of pages: 4: State: Published - 1 Dec Event: Proceedings of the 4th International Symposium on Plasma Process-Induced Damage (P2ID) - Monterey, CA, USA Duration: 9 May → 11 May
Proceedings of the 1st International Symposium on Plasma Process-Induced Damage (Santa Clara, ). J.L. Shohet, and J.P. McVittie, Proceedings of the 4nd International Symposium on Plasma Process-Induced Damage (Monterey, CA, ), in press Giapis K.P. () Fundamentals of Plasma Process-Induced Charging and Damage. In: Shul R.J Cited by: 4. This paper describes the device damage due to plasma exposure. Of the many sources of damage the oxide charging is of the most significance in modern small geometry devices fabricated in ULSI technology. In addition, edge damage also plays a significant role in the damage to the device. The effect of oxide thickness on charging damage is by: Figure 5. Typical Ig,leak mapping of a wafer processed without PPRD step. - "Plasma charging damage induced by a power ramp down step in the end of plasma enhanced chemical vapour deposition (PECVD) process". 7th International Symposium on Plasma- and Process- Induced Damage, June , Hawaii. gate, it is considered a charge retention failure. Previously observed damage facts were as follows: 1) Damage was isolated to the plasma via etch step, during which metal and poly antennas become exposed to the plasma. 2) Over-etching at the plasma via etch step.
Plasma processing induced damage of thin gate oxide is a major concern for device integrity in etch or thin film module process development. Since it was concluded that plasma nonuniformity is the root cause of such charging damage (Fang and McVittie, ; Gabriel and McVittie, ), much of the emphasis has shifted to plasma processing equipment makers to deliver more uniform plasma sources. Abstract: Two designs of experiments (DOE) have been carried out, in a magnetically enhanced reactive ion etching (MERIE) reactor and in a high-density plasma (HDP) reactor, to determine the influence of pressure, bias power and overetch on gate oxide degradation. In both cases, we find that damage can be strongly reduced by increasing pressure. For the MERIE reactor, the model used for the Author: T. Poiroux, F. Pascal, M. Heitzmann, P. Berruyer, G. Turban, G. Reimbold. Abstract: Plasma induced damage from metal etch and HDP oxide deposition are investigated on CMOS structures for different antenna environments. Grounding the antenna environment provides a good protection for NMOS structures against both of these plasma processes, but . The Online Book Page; Project Gutenberg; Read Print; Rare Book; e-Journals INDEST: Plasma Process-Induced Damage, 1st International Symposium on INDEST: Plasma Process-Induced Damage, 3rd International Symposium on: IEL: INDEST: Plasma Process-Induced Damage, 4th International Symposium on: IEL: